Add DU node to RZ/G2UL SoC DTSI.
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v2->v3:
* Dropped ports->port as it supports only DPI
* Added Rb tag from Laurent.
v1->v2:
* No change.
---
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
index d88bf23b0782..ba88c91c66c8 100644
--- a/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g043u.dtsi
@@ -153,6 +153,25 @@ fcpvd: fcp@10880000 {
resets = <&cpg R9A07G043_LCDC_RESET_N>;
};
+ du: display@10890000 {
+ compatible = "renesas,r9a07g043u-du";
+ reg = <0 0x10890000 0 0x10000>;
+ interrupts = <SOC_PERIPHERAL_IRQ(152) IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD R9A07G043_LCDC_CLK_A>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_P>,
+ <&cpg CPG_MOD R9A07G043_LCDC_CLK_D>;
+ clock-names = "aclk", "pclk", "vclk";
+ power-domains = <&cpg>;
+ resets = <&cpg R9A07G043_LCDC_RESET_N>;
+ renesas,vsps = <&vspd 0>;
+ status = "disabled";
+
+ port {
+ du_out_rgb: endpoint {
+ };
+ };
+ };
+
irqc: interrupt-controller@110a0000 {
compatible = "renesas,r9a07g043u-irqc",
"renesas,rzg2l-irqc";
--
2.43.0
