The HDMI PHY PLL can be used as an alternative clock source to RK3588 SoC CRU. Since it provides more accurate clock rates, it can be used by VOP2 to improve display modes handling, such as supporting non-integer refresh rates. The first two patches in the series provide a couple of fixes and improvements to the existing HDPTX PHY driver, while the next two add the necessary changes to support the clock provider functionality. To: Vinod Koul <vkoul@xxxxxxxxxx> To: Kishon Vijay Abraham I <kishon@xxxxxxxxxx> To: Heiko Stuebner <heiko@xxxxxxxxx> To: Algea Cao <algea.cao@xxxxxxxxxxxxxx> To: Rob Herring <robh@xxxxxxxxxx> To: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx> To: Conor Dooley <conor+dt@xxxxxxxxxx> Cc: kernel@xxxxxxxxxxxxx Cc: linux-phy@xxxxxxxxxxxxxxxxxxx Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx Cc: linux-rockchip@xxxxxxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Cc: devicetree@xxxxxxxxxxxxxxx Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@xxxxxxxxxxxxx> --- Changes in v2: - Collected Reviewed-by tag from Heiko on PATCH 1 & 2, and Acked-by from Krzysztof on PATCH 3 - Updated PATCH 4 to make use of a forced consumer put in rk_hdptx_phy_power_on() and rk_hdptx_phy_clk_unprepare() - Link to v1: https://lore.kernel.org/r/20240618-rk3588-hdmiphy-clkprov-v1-0-80e4aa12177e@xxxxxxxxxxxxx --- Cristian Ciocaltea (4): phy: phy-rockchip-samsung-hdptx: Explicitly include pm_runtime.h phy: phy-rockchip-samsung-hdptx: Enable runtime PM at PHY core level dt-bindings: phy: rockchip,rk3588-hdptx-phy: Add #clock-cells phy: phy-rockchip-samsung-hdptx: Add clock provider support .../bindings/phy/rockchip,rk3588-hdptx-phy.yaml | 3 + drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c | 206 +++++++++++++++++---- 2 files changed, 176 insertions(+), 33 deletions(-) --- base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0 change-id: 20240617-rk3588-hdmiphy-clkprov-f05f165ac029
