The MT8173 infracfg clock driver does initialization in two steps, via a CLK_OF_DECLARE_DRIVER declaration. However its early init function doesn't get to run when it's built as a module, presumably since it's not loaded by the time it would have been called by of_clk_init(). This causes its second-step probe() to return -ENOMEM when trying to register clocks, as the necessary clock_data struct isn't initialized by the first step. MT2701 and MT6797 clock drivers also use this mechanism, but they try to allocate the necessary clock_data structure if missing in the second step. Mimic that for the MT8173 infracfg clock as well to make it work as a module. Signed-off-by: Alper Nebi Yasak <alpernebiyasak@xxxxxxxxx> --- Changes in v2: - Rewrite patch subject for consistency v1: https://lore.kernel.org/lkml/20231108213734.140707-1-alpernebiyasak@xxxxxxxxx/ drivers/clk/mediatek/clk-mt8173-infracfg.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c index 2f2f074e231a..ecc8b0063ea5 100644 --- a/drivers/clk/mediatek/clk-mt8173-infracfg.c +++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c @@ -98,7 +98,17 @@ CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg", static int clk_mt8173_infracfg_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; - int r; + int r, i; + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); + if (!infra_clk_data) + return -ENOMEM; + } else { + for (i = 0; i < CLK_INFRA_NR_CLK; i++) + if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER)) + infra_clk_data->hws[i] = ERR_PTR(-ENOENT); + } r = mtk_clk_register_gates(&pdev->dev, node, infra_gates, ARRAY_SIZE(infra_gates), infra_clk_data); base-commit: 03d44168cbd7fc57d5de56a3730427db758fc7f6 -- 2.45.1
