A previous patch fixes an issue with the mt8173-infracfg clock driver
when working as a module, but has the side effect of skipping set up of
CLK_INFRA_CLK_13M in that case. This clock is used by the timer device.
Similar to the MT8183, MT8192, MT8195 and MT8186 cases [1], change the
input clock of the timer block a fixed factor divide-by-2 clock that
takes the 26 MHz oscillator as its input.
Also remove the RTC clock from the timer node while we're here. According
to commit 59311b19d7f63 ("clocksource/drivers/timer-mediatek: Add system
timer bindings") it is no longer used.
[1] https://lore.kernel.org/all/20221201084229.3464449-1-wenst@xxxxxxxxxxxx/
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@xxxxxxxxx>
---
Tested on a MT8173 Chromebook. But I'm not sure I understand all of
this, so review with a pinch of salt.
Changes in v2:
- Add this patch
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 3458be7f7f61..809b379b6818 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -244,6 +244,15 @@ psci {
cpu_on = <0x84000003>;
};
+ clk13m: fixed-factor-clock-13m {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&clk26m>;
+ clock-div = <2>;
+ clock-mult = <1>;
+ clock-output-names = "clk13m";
+ };
+
clk26m: oscillator0 {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -530,8 +539,7 @@ timer: timer@10008000 {
"mediatek,mt6577-timer";
reg = <0 0x10008000 0 0x1000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&infracfg CLK_INFRA_CLK_13M>,
- <&topckgen CLK_TOP_RTC_SEL>;
+ clocks = <&clk13m>;
};
pwrap: pwrap@1000d000 {
--
2.45.1
