On 04/06/2024 11:52, Siddharth Vadapalli wrote: > Enable PCIe0 instance of PCIe in Root Complex mode of operation with Lane 0 > of the SERDES1 instance of SERDES. Also enable USB0 instance of USB to > interface with the Type-C port via the USB hub, by configuring the pin P05 > of the GPIO expander on the EVM. Enable USB1 instance of USB in SuperSpeed > mode of operation with Lane 0 of the SERDES0 instance of SERDES. > > Co-developed-by: Ravi Gunasekaran <r-gunasekaran@xxxxxx> > Signed-off-by: Ravi Gunasekaran <r-gunasekaran@xxxxxx> > Signed-off-by: Siddharth Vadapalli <s-vadapalli@xxxxxx> Acked-by: Roger Quadros <rogerq@xxxxxxxxxx>
