Hello, This series adds the device-tree support for enabling PCIe and USB functionality on J722S-EVM. Since AM62P and J722S SoCs share most of the peripherals, the files have been renamed to indicate the same. The main domain peripherals on both SoCs that aren't shared are present in the "soc-main.dtsi" files. This change has been made based on Roger's feedback at: https://lore.kernel.org/r/f52d9569-a399-422f-9cf0-b0bf69b64d18@xxxxxxxxxx/ This series has been tested on J722S-EVM for PCIe and USB functionality: https://gist.github.com/Siddharth-Vadapalli-at-TI/02c037efd3666ea8232d7bb8b0fa42f3 Sanity testing on AM62P5-SK with this series: https://gist.github.com/Siddharth-Vadapalli-at-TI/1fb178f31b7cbc8eefd424e1e540ef3b v4: https://lore.kernel.org/r/20240601121554.2860403-1-s-vadapalli@xxxxxx/ Changes since v4: - Rebased series on linux-next tagged next-20240604. - Based on Andrew's feedback at: https://lore.kernel.org/r/086fa11e-10f8-463d-8966-1a33a52a3146@xxxxxx/ MCU was retained as-is while main and wakeup were changed to MAIN and WAKEUP in the respective shared files. Also, newline was added between the file description and the Copyright in all the files. Collected Acked-by tag for the 1st patch since these changes have been made. - Based on Andrew's feedback at: https://lore.kernel.org/r/147d58a6-0cad-47b6-a069-755f835a77e9@xxxxxx/ SERDES1 has also been disabled in k3-j722s-main.dtsi similar to SERDES0. - Based on Andrew's feedback at: https://lore.kernel.org/r/183a9d15-939e-433b-84ba-8a64eb8ef3ec@xxxxxx/ the `status = "okay";` line has been moved to the end of the `pcie0_rc` node referenced in k3-j722s-evm.dts following the updated ordering rules. Also, the SERDES1 node has been enabled in the k3-j722s-evm.dts file since it has been disabled in the k3-j722s-main.dtsi file. Regards, Siddharth. Siddharth Vadapalli (7): arm64: dts: ti: am62p: Rename am62p-{}.dtsi to am62p-j722s-common-{}.dtsi arm64: dts: ti: k3-am62p-j722s: Move AM62P specific USB1 to am62p-main.dtsi arm64: dts: ti: k3-j722s: Add main domain peripherals specific to J722S arm64: dts: ti: k3-j722s: Switch to k3-am62p-j722s-common.dtsi arm64: dts: ti: k3-serdes: Add SERDES0/SERDES1 lane-muxing macros for J722S arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support arm64: dts: ti: k3-j722s: Enable PCIe and USB support on J722S-EVM .../dts/ti/k3-am62p-j722s-common-main.dtsi | 1068 +++++++++++++++++ ...cu.dtsi => k3-am62p-j722s-common-mcu.dtsi} | 3 +- ...dtsi => k3-am62p-j722s-common-wakeup.dtsi} | 3 +- ...-am62p.dtsi => k3-am62p-j722s-common.dtsi} | 6 +- arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 1063 +--------------- arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 3 +- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 73 ++ arch/arm64/boot/dts/ti/k3-j722s-main.dtsi | 173 +++ arch/arm64/boot/dts/ti/k3-j722s.dtsi | 97 +- arch/arm64/boot/dts/ti/k3-serdes.h | 8 + 10 files changed, 1429 insertions(+), 1068 deletions(-) create mode 100644 arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi rename arch/arm64/boot/dts/ti/{k3-am62p-mcu.dtsi => k3-am62p-j722s-common-mcu.dtsi} (98%) rename arch/arm64/boot/dts/ti/{k3-am62p-wakeup.dtsi => k3-am62p-j722s-common-wakeup.dtsi} (97%) rename arch/arm64/boot/dts/ti/{k3-am62p.dtsi => k3-am62p-j722s-common.dtsi} (97%) create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-main.dtsi -- 2.40.1
