[PATCH v2 0/3] Add the core reset for UARTs of StarFive JH7110

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



The UART of StarFive JH7110 needs two reset signals (apb, core) to
initialize. This patch series adds the missing core reset.

Changes since v1:
- Set maxItems to 1 for resets from other platforms.

History:
v1: https://lore.kernel.org/all/20240517061713.95803-1-hal.feng@xxxxxxxxxxxxxxxx/

Hal Feng (3):
  dt-bindings: serial: snps-dw-apb-uart: Add one more reset signal for
    StarFive JH7110 SoC
  serial: 8250_dw: Use reset array API to get resets
  riscv: dts: starfive: jh7110: Add the core reset and jh7110 compatible
    for uarts

 .../bindings/serial/snps-dw-apb-uart.yaml     | 18 ++++++++++-
 arch/riscv/boot/dts/starfive/jh7110.dtsi      | 30 +++++++++++--------
 drivers/tty/serial/8250/8250_dw.c             |  2 +-
 3 files changed, 36 insertions(+), 14 deletions(-)


base-commit: c3f38fa61af77b49866b006939479069cd451173
-- 
2.43.2





[Index of Archives]     [Device Tree Compilter]     [Device Tree Spec]     [Linux Driver Backports]     [Video for Linux]     [Linux USB Devel]     [Linux PCI Devel]     [Linux Audio Users]     [Linux Kernel]     [Linux SCSI]     [XFree86]     [Yosemite Backpacking]


  Powered by Linux