Hi Geert,
> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: Wednesday, May 22, 2024 1:23 PM
> Subject: Re: [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for
> locking/unlocking the PFC register
>
> Hi Biju,
>
> On Tue, Apr 23, 2024 at 8:12 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote:
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@xxxxxxxxx>
> > > Sent: Tuesday, April 23, 2024 6:59 PM
> > > Subject: [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add
> > > function pointers for locking/unlocking the PFC register
> > >
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > >
> > > On the RZ/G2L SoC, the PFCWE bit controls writing to PFC registers.
> > > However, on the RZ/V2H(P) SoC, the PFCWE (REGWE_A on RZ/V2H) bit
> > > controls writing to both PFC and PMC registers. Additionally, BIT(7)
> > > B0WI is undocumented for the PWPR register on RZ/V2H(P) SoC. To
> > > accommodate these differences across SoC variants, introduce the
> > > set_pfc_mode() and
> > > pm_set_pfc() function pointers.
> > >
> > > Note, in rzg2l_pinctrl_set_pfc_mode() the pwpr_pfc_unlock() call is
> > > now called before PMC read/write and pwpr_pfc_lock() call is now
> > > called after PMC read/write this is to keep changes minimal for RZ/V2H(P).
> > >
> > > Signed-off-by: Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > ---
> > > RFC->v2
> > > - Introduced function pointer for (un)lock
>
> > > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > > @@ -2688,6 +2699,8 @@ static struct rzg2l_pinctrl_data r9a07g043_data = {
> > > .variable_pin_cfg = r9a07g043f_variable_pin_cfg,
> > > .n_variable_pin_cfg = ARRAY_SIZE(r9a07g043f_variable_pin_cfg),
> > > #endif
> > > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
> > > };
> > >
> > > static struct rzg2l_pinctrl_data r9a07g044_data = { @@ -2699,6
> > > +2712,8 @@ static struct rzg2l_pinctrl_data r9a07g044_data = {
> > > .n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) +
> > > ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins),
> > > .hwcfg = &rzg2l_hwcfg,
> > > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
> > > };
> > >
> > > static struct rzg2l_pinctrl_data r9a08g045_data = { @@ -2709,6
> > > +2724,8 @@ static struct rzg2l_pinctrl_data r9a08g045_data = {
> > > .n_port_pins = ARRAY_SIZE(r9a08g045_gpio_configs) * RZG2L_PINS_PER_PORT,
> > > .n_dedicated_pins = ARRAY_SIZE(rzg3s_dedicated_pins),
> > > .hwcfg = &rzg3s_hwcfg,
> > > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
> >
> > Some memory can be saved by avoiding duplication of data by using a
> > single pointer for structure containing function pointers??
> >
> > struct rzg2l_pinctrl_fns {
> > void (*pwpr_pfc_unlock)(struct rzg2l_pinctrl *pctrl);
> > void (*pwpr_pfc_lock)(struct rzg2l_pinctrl *pctrl); }
>
> So that would replace 3 (4 after adding RZ/V2H support) x 2 pointers in rzg2l_pinctrl_data
> structures by 3 (4) pointers in rzg2l_pinctrl_data structures + 1 (2) x 2 pointers in
> rzg2l_pinctrl_fns structures, and code size would increase due to extra pointer dereferences before
> each call.
> Am I missing something?
Current case
3 * 2 pointers = 6 pointers
Suggestion
3 * 1 pointer + 1 * 2 pointer = 5 pointers
As you said, code size would increase due to extra pointer dereferences before
each call.
>
> Merging rzg2l_pwpr_pfc_{,un}lock() into a single function (taking a "bool lock" flag) might be a
> better solution to reduce rzg2l_pinctrl_data size.
I agree.
Cheers,
Biju
