From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> Hi All, This patch series aims to add PFC (Pin Function Controller) support for Renesas RZ/V2H(P) SoC. The PFC block on RZ/V2H(P) is almost similar to one found on the RZ/G2L family with couple of differences. To able to re-use the use the existing driver for RZ/V2H(P) SoC function pointers are introduced based on the SoC changes. RFC->v2 - Fixed review comments pointed by Rob - Incorporated changes suggested by Claudiu - Fixed build error reported for m68K - Dropped IOLH groups as we will be passing register values - Fixed configs for dedicated pins - Added support for slew-rate and bias settings - Added support for OEN RFC: https://patchwork.kernel.org/project/linux-renesas-soc/cover/20240326222844.1422948-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ Cheers, Prabhakar Lad Prabhakar (13): dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH pinctrl: renesas: pinctrl-rzg2l: Add function pointers for locking/unlocking the PFC register pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register pinctrl: renesas: pinctrl-rzg2l: Add support to configure the slew-rate pinctrl: renesas: pinctrl-rzg2l: Add support to set pulling up/down the pins pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() pinctrl: renesas: pinctrl-rzg2l: Add support for custom parameters pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC .../pinctrl/renesas,rzg2l-pinctrl.yaml | 40 +- drivers/pinctrl/renesas/pinctrl-rzg2l.c | 640 ++++++++++++++++-- 2 files changed, 617 insertions(+), 63 deletions(-) -- 2.34.1
