On 22.04.2024 10:46:19, Steffen Trumtrar wrote:
> In case of RMII connection, the TX_CLK must be set to output direction.
> Parse the register and offset from the devicetree and set the direction
> of the TX_CLK when the property was provided.
>
> Signed-off-by: Steffen Trumtrar <s.trumtrar@xxxxxxxxxxxxxx>
> ---
> drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 27 +++++++++++++++++++++++++
> 1 file changed, 27 insertions(+)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> index 6b65420e11b5c..0fc81a626a664 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c
> @@ -37,6 +37,9 @@
> #define MX93_GPR_ENET_QOS_INTF_SEL_RGMII (0x1 << 1)
> #define MX93_GPR_ENET_QOS_CLK_GEN_EN (0x1 << 0)
>
> +#define MX93_GPR_ENET_QOS_TX_CLK_SEL_MASK GENMASK(1, 1)
> +#define MX93_GPR_ENET_QOS_TX_CLK_SEL (0x1 << 1)
> +
> #define DMA_BUS_MODE 0x00001000
> #define DMA_BUS_MODE_SFT_RESET (0x1 << 0)
> #define RMII_RESET_SPEED (0x3 << 14)
> @@ -57,7 +60,9 @@ struct imx_priv_data {
> struct clk *clk_tx;
> struct clk *clk_mem;
> struct regmap *intf_regmap;
> + struct regmap *enet_clk_regmap;
> u32 intf_reg_off;
> + u32 enet_clk_reg_off;
> bool rmii_refclk_ext;
> void __iomem *base_addr;
>
> @@ -116,6 +121,18 @@ static int imx93_set_intf_mode(struct plat_stmmacenet_data *plat_dat)
> break;
> case PHY_INTERFACE_MODE_RMII:
> val = MX93_GPR_ENET_QOS_INTF_SEL_RMII;
> +
> + /* According to NXP AN14149, the direction of the
> + * TX_CLK must be set to output in RMII mode.
> + */
> + if (dwmac->enet_clk_regmap)
> + regmap_update_bits(dwmac->enet_clk_regmap,
> + dwmac->enet_clk_reg_off,
> + MX93_GPR_ENET_QOS_TX_CLK_SEL_MASK,
> + MX93_GPR_ENET_QOS_TX_CLK_SEL);
Please add error handling.
> + else
> + dev_warn(dwmac->dev, "TX_CLK can't be set to output mode.\n");
As far as I understand the AN14149, setting the TX_CLK_SEL is mandatory
for PHY_INTERFACE_MODE_RMII. IMHO this should be error, shouldn't it?
> +
> break;
> case PHY_INTERFACE_MODE_RGMII:
> case PHY_INTERFACE_MODE_RGMII_ID:
> @@ -310,6 +327,16 @@ imx_dwmac_parse_dt(struct imx_priv_data *dwmac, struct device *dev)
> dev_err(dev, "Can't get intf mode reg offset (%d)\n", err);
> return err;
> }
> +
> + dwmac->enet_clk_regmap = syscon_regmap_lookup_by_phandle(np, "enet_clk_sel");
> + if (IS_ERR(dwmac->enet_clk_regmap))
> + return PTR_ERR(dwmac->enet_clk_regmap);
> +
> + err = of_property_read_u32_index(np, "enet_clk_sel", 1, &dwmac->enet_clk_reg_off);
> + if (err) {
> + dev_err(dev, "Can't get enet clk sel reg offset (%d)\n", err);
> + return err;
> + }
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
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