On Fri 12 Apr 2024 at 14:08, Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> wrote: > [[PGP Signed Part:Undecided]] > On Wed, Feb 21, 2024 at 04:11:51PM +0100, Jerome Brunet wrote: >> Introduce a new compatible support in the Amlogic PWM driver. >> >> The PWM HW is actually the same for all SoCs supported so far. A specific >> compatible is needed only because the clock sources of the PWMs are >> hard-coded in the driver. >> >> It is better to have the clock source described in DT but this changes the >> bindings so a new compatible must be introduced. >> >> When all supported platform have migrated to the new compatible, support >> for the legacy ones may be removed from the driver. >> >> The addition of this new compatible makes the old ones obsolete, as >> described in the DT documentation. >> >> Adding a callback to setup the clock will also make it easier to add >> support for the new PWM HW found in a1, s4, c3 and t7 SoC families. >> >> Signed-off-by: Jerome Brunet <jbrunet@xxxxxxxxxxxx> > > After spending some brain cycles on this one I think I understood it. > Looks fine to me, I only considered questioning if the dev_warn_once is > too offensive. > > b4 + git applied the patch just fine even without patch #4 of this > series. Would you be so kind to double check it works as intended? It does, Thx. > > BTW, b4 diagnosed: > > Checking attestation on all messages, may take a moment... > --- > ✗ [PATCH v5 5/5] pwm: meson: add generic compatible for meson8 to sm1 > + Link: https://lore.kernel.org/r/20240221151154.26452-6-jbrunet@xxxxxxxxxxxx > + Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> > --- > ✗ BADSIG: DKIM/baylibre-com.20230601.gappssmtp.com > > Is this only because it took me so long to reply, or is there a > configuration issue with the baylibre MTA? I have no idea. This is the first time this is reported > > Best regards > Uwe -- Jerome
