On Thu, 04 Apr 2024 20:44:02 +1300
"Ryan Walklin" <ryan@xxxxxxxxxxxxx> wrote:
Hi Ryan,
> On Thu, 4 Apr 2024, at 7:40 PM, Viresh Kumar wrote:
> > Is it okay to merge all the changes via the cpufreq tree ?
>
> I have tested this series with an H700-based board, and have at least one speed-bin (1.032GHz) is not supported although the governor attempts to enable it based on the opp-supported-hw bitmask, and I am unable to reach the 1.5GHz bin at 1.16v (or higher) despite it working on the vendor BSP (kernel panic at boot if enabled), so this may need some slight rework.
Thanks for the report!
So can you try to merge the 1.032 GHz OPP into the 1.008 GHz one? That
would be beneficial anyways since this is the default frequency that
U-Boot sets up.
Should be:
opp-1008000000 {
....
opp-microvolt-speed5 = <900000>;
opp-supported-hw = <0x3f>;
....
As for the 1.5 GHz speed bin: We could leave that out for now if it
causes trouble. But can you first state how you got the OPPs? I copied
them from some table you dumped once on IRC, but it would be good to
double check what the actual values are that the BSP kernel runs with.
The values in the vendor DT are highly inconsistent, besides we don't
know for sure which speed bin index the BSP is using and how this maps
to our method.
Cheers,
Andre
> I have reached out to Andre on IRC to debug.
>
> Ryan
