Hi Andrew, On 18/03/24 4:31 pm, Parthiban.Veerasooran@xxxxxxxxxxxxx wrote: > Hi Andrew, > > On 08/03/24 7:03 pm, Andrew Lunn wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >>> Ok, as per the table 6 in the spec, PHY C45 registers are mapped in the >>> MMS like below, >>> >>> PHY – PCS Registers (MMD 3) ---> MMS 2 >>> PHY – PMA/PMD Registers (MMD 1) ---> MMS 3 >>> PHY – Vendor Specific and PLCA Registers (MMD 31) ---> MMS 4 >>> PHY – Auto-Negotiation Registers (MMD 7) ---> MMS 5 >>> PHY – Power Unit (MMD 13) ---> MMS 6 >>> >>> MMD 13 for PHY - Power Unit is not defined in the mdio.h. So in the >>> below code I have defined it locally (MDIO_MMD_POWER_UNIT). May be >>> needed to do this in the mdio.h file when coming to this patch. >> >> Yes, please add it to mdio.h > Sure will add it in the mdio.h file. >> >>> /* PHY – Clause 45 registers memory map selector (MMS) as per table 6 in >>> the OPEN Alliance specification. >>> */ >>> #define OA_TC6_PHY_PCS_MMS2 2 /* MMD 3 */ >>> #define OA_TC6_PHY_PMA_PMD_MMS3 3 /* MMD 1 */ >>> #define OA_TC6_PHY_VS_PLCA_MMS4 4 /* MMD 31 */ >>> #define OA_TC6_PHY_AUTO_NEG_MMS5 5 /* MMD 7 */ >>> #define OA_TC6_PHY_POWER_UNIT_MMS6 6 /* MMD 13 */ >>> >>> /* MDIO Manageable Device (MMD) for PHY Power Unit */ >>> #define MDIO_MMD_POWER_UNIT 13 /* PHY Power Unit */ >>> >>> static int oa_tc6_mdiobus_read_c45(struct mii_bus *bus, int addr, int >>> devnum, int regnum) >>> { >>> >>> struct oa_tc6 *tc6 = bus->priv; >>> >>> u32 regval; >>> >>> bool ret; >>> >>> u32 mms; >>> >>> >>> >>> if (devnum == MDIO_MMD_PCS) >>> >>> mms = OA_TC6_PHY_PCS_MMS2; >>> >>> else if (devnum == MDIO_MMD_PMAPMD) >>> >>> mms = OA_TC6_PHY_PMA_PMD_MMS3; >>> >>> else if (devnum == MDIO_MMD_VEND2) >>> >>> mms = OA_TC6_PHY_VS_PLCA_MMS4; >>> >>> else if (devnum == MDIO_MMD_AN) >>> >>> mms = OA_TC6_PHY_AUTO_NEG_MMS5; >>> >>> else if (devnum == MDIO_MMD_POWER_UNIT) >>> >>> mms = OA_TC6_PHY_POWER_UNIT_MMS6; >> >> I would probably use a switch statement. > Ah ok, I will use switch here. >> >>> >>> else >>> >>> return -ENOTSUPP; >> >> 802.3 says: >> >> If a device supports the MDIO interface it shall respond to all >> possible register addresses for the device and return a value of >> zero for undefined and unsupported registers. Writes to undefined >> registers and read-only registers shall have no effect. The >> operation of an MMD shall not be affected by writes to reserved and >> unsupported register bits, and such register bits shall return a >> value of zero when read. >> >> So maybe return 0. ENOTSUPP is wrong, that is an NFS only error >> code. The generic one is EOPNOTSUPP. I would say -EOPNOTSUPP is also >> O.K. > Sure, I will use -EOPNOTSUPP in the next version instead of -ENOTSUPP. >> >>> ret = oa_tc6_read_register(tc6, (mms << 16) | regnum, ®val); >>> >>> if (ret) >>> >>> return -ENODEV; >> >> oa_tc6_read_register() should return an error code, so return whatever >> is returns. Don't overwrite error codes. It makes it harder to track >> errors through the call stack. > Ah ok, will return the error code from oa_tc6_read_register() in the > next version. After implementing the new APIs oa_tc6_mdiobus_read_c45() and oa_tc6_mdiobus_write_c45(), I tried testing. But, for some reason these APIs are never get called by phy_read_mmd() or phy_write_mmd() as those APIs are checking for phydev->is_c45 flag for calling this new c45 APIs which is not set in this case. If the phydev is found via c22, phylib does not set phydev->is_c45, and everything ends up going indirect. To verify the APIs, I just called them locally withing the oa_tc6_init() function, there I got the expected results but accessing them through phylib is not working because of the above reason. Do you have any idea or suggestion to test this APIs or do I miss anything here? Best regards, Parthiban V > > Best regards, > Parthiban V >> >> Andrew >> >