On 23.02.2024 19:29, Varshini Rajendran wrote:
> Add support to get number of IRQs from the respective DT node for sam9x60
> and sam9x7 devices. Since only this factor differs between the two SoCs,
> this patch adds support for the same. Adapt the sam9x60 dtsi
> accordingly.
>
> Signed-off-by: Varshini Rajendran <varshini.rajendran@xxxxxxxxxxxxx>
> ---
> Changes in v4:
> - Changed the implementation to fetch the NIRQs from DT as per the
> comment to avoid introducing a new compatible when this is the only
> difference between the SoCs related to this IP.
> ---
> arch/arm/boot/dts/microchip/sam9x60.dtsi | 1 +
> drivers/irqchip/irq-atmel-aic5.c | 11 ++++++++---
> 2 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
> index 73d570a17269..e405f68c9f54 100644
> --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
> +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
> @@ -1201,6 +1201,7 @@ aic: interrupt-controller@fffff100 {
> interrupt-controller;
> reg = <0xfffff100 0x100>;
> atmel,external-irqs = <31>;
> + microchip,nr-irqs = <50>;
> };
>
> dbgu: serial@fffff200 {
> diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
> index 145535bd7560..5d96ad8860d3 100644
> --- a/drivers/irqchip/irq-atmel-aic5.c
> +++ b/drivers/irqchip/irq-atmel-aic5.c
> @@ -398,11 +398,16 @@ static int __init sama5d4_aic5_of_init(struct device_node *node,
> }
> IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init);
>
> -#define NR_SAM9X60_IRQS 50
> -
> static int __init sam9x60_aic5_of_init(struct device_node *node,
> struct device_node *parent)
> {
> - return aic5_of_init(node, parent, NR_SAM9X60_IRQS);
> + int ret, nr_irqs;
> +
> + ret = of_property_read_u32(node, "microchip,nr-irqs", &nr_irqs);
> + if (ret) {
> + pr_err("Not found microchip,nr-irqs property\n");
This breaks the ABI. You should ensure old device trees are still working
with this patch.
> + return ret;
> + }
> + return aic5_of_init(node, parent, nr_irqs);
> }
> IRQCHIP_DECLARE(sam9x60_aic5, "microchip,sam9x60-aic", sam9x60_aic5_of_init);
