From: Yang Xiwen <forbidden405@xxxxxxxxxxx> For some FEMAC cores, MDIO bus is integrated to the MAC controller. So We don't have a dedicated MDIO bus clock. Also due to the PHY reset procedure, it's required to manage all clocks and resets in the MAC controller driver. MAC controller clock can not be shared with MDIO bus node in dts. Mark the clock optional to resolve this problem. Signed-off-by: Yang Xiwen <forbidden405@xxxxxxxxxxx> --- .../bindings/net/hisilicon,hisi-femac-mdio.yaml | 43 ++++++++++++++++++++++ .../bindings/net/hisilicon-femac-mdio.txt | 22 ----------- 2 files changed, 43 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml new file mode 100644 index 000000000000..ee8650ad98fc --- /dev/null +++ b/Documentation/devicetree/bindings/net/hisilicon,hisi-femac-mdio.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/hisilicon,hisi-femac-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HiSilicon FEMAC MDIO bus + +maintainers: + - Yang Xiwen <forbidden405@xxxxxxxxxxx> + +allOf: + - $ref: mdio.yaml# + +properties: + compatible: + const: hisilicon,hisi-femac-mdio + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + mdio@10091100 { + compatible = "hisilicon,hisi-femac-mdio"; + reg = <0x10091100 0x20>; + clocks = <&clk_mdio>; + #address-cells = <1>; + #size-cells = <0>; + + phy@1 { + reg = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt b/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt deleted file mode 100644 index 23a39a309d17..000000000000 --- a/Documentation/devicetree/bindings/net/hisilicon-femac-mdio.txt +++ /dev/null @@ -1,22 +0,0 @@ -Hisilicon Fast Ethernet MDIO Controller interface - -Required properties: -- compatible: should be "hisilicon,hisi-femac-mdio". -- reg: address and length of the register set for the device. -- clocks: A phandle to the reference clock for this device. - -- PHY subnode: inherits from phy binding [1] -[1] Documentation/devicetree/bindings/net/phy.txt - -Example: -mdio: mdio@10091100 { - compatible = "hisilicon,hisi-femac-mdio"; - reg = <0x10091100 0x10>; - clocks = <&crg HI3516CV300_MDIO_CLK>; - #address-cells = <1>; - #size-cells = <0>; - - phy0: phy@1 { - reg = <1>; - }; -}; -- 2.43.0
