Re: [PATCH v2 2/2] net: phy: dp83826: support TX data voltage tuning

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On 08.02.24 17:50, Andrew Lunn wrote:
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>> Now, I understand your question 🙂
>> To answer, DP83826_CFG_DAC_MINUS_DEFAULT will indeed leave the register
>> unchanged. However, dp83822 driver exports a PHY callback soft_reset
>> which does a SW reset which actually has the same effect as the HW reset
>> pin according to the datasheet. Since the PAL enforces the call to
>> soft_reset before config_init, in dp83826_config_init we can rely on the
>> registers reset value.
> Great. Please add a version of this to the commit message. That shows
> we did our due diligence and we don't expect any surprises in the
> future.
Sure, I'll update the commit message in v3.
>      Andrew
>
> ---
> pw-bot: cr






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