On Sun, 04 Feb 2024 14:33:36 +0530, Siddharth Vadapalli wrote:
> The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC
> are used to configure the link speed, lane count and mode of operation
> of the respective PCIe instance. Add compatible for allowing the PCIe
> driver to obtain a regmap for the PCIE_CTRL register within the System
> Controller device-tree node in order to configure the PCIe instance
> accordingly.
>
> [...]
Applied, thanks!
[1/1] dt-bindings: mfd: syscon: Add ti,j784s4-pcie-ctrl compatible
commit: 90ba55d8e3bce146a7368d271cea1b7a1d0643bb
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Lee Jones [李琼斯]
