On 04/02/2024 10:03, Siddharth Vadapalli wrote: > The PCIE_CTRL registers within the CTRL_MMR space of TI's J784S4 SoC > are used to configure the link speed, lane count and mode of operation > of the respective PCIe instance. Add compatible for allowing the PCIe > driver to obtain a regmap for the PCIE_CTRL register within the System > Controller device-tree node in order to configure the PCIe instance > accordingly. > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
