From: Chen Wang <unicorn_wang@xxxxxxxxxxx> Add documentation to describe Sophgo System Control for SG2042. Signed-off-by: Chen Wang <unicorn_wang@xxxxxxxxxxx> --- .../soc/sophgo/sophgo,sg2042-sysctrl.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml new file mode 100644 index 000000000000..7b50bb56b4cf --- /dev/null +++ b/Documentation/devicetree/bindings/soc/sophgo/sophgo,sg2042-sysctrl.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/sophgo/sophgo,sg2042-sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo SG2042 SoC system control + +maintainers: + - Chen Wang <unicorn_wang@xxxxxxxxxxx> + +description: + The Sophgo system control is a registers block (SYS_CTRL), providing multiple + low level platform functions like chip configuration, clock control, etc. + +properties: + compatible: + const: sophgo,sg2042-sysctrl + + reg: + maxItems: 1 + + clock-controller: + # Child node + $ref: /schemas/clock/sophgo,sg2042-sysclk.yaml# + type: object + +required: + - compatible + - reg + - clock-controller + +additionalProperties: false + +examples: + - | + system-control@30010000 { + compatible = "sophgo,sg2042-sysctrl"; + reg = <0x30010000 0x1000>; + + clock-controller { + compatible = "sophgo,sg2042-sysclk"; + clocks = <&cgi_main>, <&cgi_dpll0>, <&cgi_dpll1>; + #clock-cells = <1>; + }; + }; -- 2.25.1
