Hi Pete, On Fri, 2023-12-01 at 16:09 +0000, Peter Griffin wrote: > cmu_top is the top level clock management unit which contains PLLs, muxes, > dividers and gates that feed the other clock management units. > > cmu_misc clocks IPs such as Watchdog and cmu_apm clocks ips part of the > APM module. > > Acked-by: Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > Tested-by: Will McVicker <willmcvicker@xxxxxxxxxx> > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> > --- > drivers/clk/samsung/Makefile | 1 + > drivers/clk/samsung/clk-gs101.c | 2495 +++++++++++++++++++++++++++++++ > 2 files changed, 2496 insertions(+) > create mode 100644 drivers/clk/samsung/clk-gs101.c > > diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile > index ebbeacabe88f..3056944a5a54 100644 > --- a/drivers/clk/samsung/Makefile > +++ b/drivers/clk/samsung/Makefile > @@ -21,6 +21,7 @@ obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos850.o > obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynosautov9.o > +obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-gs101.o > obj-$(CONFIG_S3C64XX_COMMON_CLK) += clk-s3c64xx.o > obj-$(CONFIG_S5PV210_COMMON_CLK) += clk-s5pv210.o clk-s5pv210-audss.o > obj-$(CONFIG_TESLA_FSD_COMMON_CLK) += clk-fsd.o > diff --git a/drivers/clk/samsung/clk-gs101.c b/drivers/clk/samsung/clk-gs101.c > new file mode 100644 > index 000000000000..6bd233a7ab63 > --- /dev/null > +++ b/drivers/clk/samsung/clk-gs101.c > @@ -0,0 +1,2495 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (C) 2023 Linaro Ltd. > + * Author: Peter Griffin <peter.griffin@xxxxxxxxxx> > + * > + * Common Clock Framework support for GS101. > + */ > + > +#include <linux/clk.h> > +#include <linux/clk-provider.h> > +#include <linux/of.h> > +#include <linux/of_device.h> > +#include <linux/platform_device.h> > + > +#include <dt-bindings/clock/google,gs101.h> > + > +#include "clk.h" > +#include "clk-exynos-arm64.h" > + > +/* NOTE: Must be equal to the last clock ID increased by one */ > +#define TOP_NR_CLK (CLK_GOUT_TPU_UART + 1) > +#define APM_NR_CLK (CLK_APM_PLL_DIV16_APM + 1) > +#define MISC_NR_CLK (CLK_GOUT_MISC_XIU_D_MISC_IPCLKPORT_ACLK + 1) > + > +/* ---- CMU_TOP ------------------------------------------------------------- */ > + > [...] > + > +/* ---- CMU_APM ------------------------------------------------------------- */ > [..] > + > +/* ---- CMU_MISC ------------------------------------------------------------- */ nit - the CMU_MISC comment here is an outlier. > [..] > + > +/* ---- platform_driver ----------------------------------------------------- */ > + > [...] Cheers, Andre'