On 01/12/2023 11:52, Tzuyi Chang wrote:
> + "#phy-cells":
> + const: 0
> +
> + nvmem-cells:
> + maxItems: 1
> + description:
> + Phandle to nvmem cell that contains 'Tx swing trim'
> + tuning parameter value for PCIe phy.
> +
> + nvmem-cell-names:
> + items:
> + - const: tx_swing_trim
> +
> + realtek,pcie-syscon:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description: phandle of syscon used to control PCIe MDIO register.
Why this does not have reg property but syscon? This looks hacky.
Where is the DTS of your platform so we can verify the bindings? In the
past Realtek bindings and DTS were sent without testing.
> +
> +required:
> + - compatible
> + - realtek,pcie-syscon
> + - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pcie1_phy {
phy {
Best regards,
Krzysztof
