From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> On Tue, 31 Oct 2023 15:14:42 +0100, Emil Renner Berthing wrote: > This series adds support for the StarFive JH7100 SoC to the SiFive cache > controller driver. The JH7100 was a "development version" of the JH7110 > used on the BeagleV Starlight and VisionFive V1 boards. It has > non-coherent peripheral DMAs but was designed before the standard RISC-V > Zicbom extension, so it neeeds support in this driver for non-standard > cache management. > > [...] Applied to riscv-cache-for-next, thanks! I still need to figure out how I want to put things into linux-next as Arnd wants these cache driver things in a PR of their own. [1/2] dt-bindings: cache: sifive,ccache0: Add StarFive JH7100 compatible https://git.kernel.org/conor/c/3d70b9853b44 [2/2] soc: sifive: ccache: Add StarFive JH7100 support https://git.kernel.org/conor/c/0d5701dc9cd6 Thanks, Conor.