On Tue, Oct 31, 2023 at 03:14:42PM +0100, Emil Renner Berthing wrote: > This series adds support for the StarFive JH7100 SoC to the SiFive cache > controller driver. The JH7100 was a "development version" of the JH7110 > used on the BeagleV Starlight and VisionFive V1 boards. It has > non-coherent peripheral DMAs but was designed before the standard RISC-V > Zicbom extension, so it neeeds support in this driver for non-standard > cache management. > > Since v1: > - Fix email threading, hopefully. > - Drop sifive,ccache-ops device tree property and just match on the > compatible. (Conor) I'll grab these after the mw, presuming nothing comes up in the interim.
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