On 11/15/2023 11:19 PM, Andrew Lunn wrote:
+static void ipq_cmn_clock_config(struct mii_bus *bus)
+{
+ u32 reg_val;
+ const char *cmn_ref_clk;
+ struct ipq4019_mdio_data *priv = bus->priv;
Reverse christmass tree place.
will fix it in the next patch set.
+
+ if (priv && priv->cmn_membase) {
Can priv be NULL? Can cmn_membase be NULL?
priv can't be NULL, cmn_membase is optional, the legacy chip does not
provide the cmn_membase in device node.
will remove the priv check here.
+ reg_val = readl(priv->cmn_membase + CMN_PLL_REFERENCE_CLOCK);
+ reg_val &= ~(CMN_PLL_REFCLK_EXTERNAL | CMN_PLL_REFCLK_INDEX);
+
+ /* Select reference clock source */
+ cmn_ref_clk = of_get_property(bus->parent->of_node, "cmn_ref_clk", NULL);
+ if (!cmn_ref_clk) {
+ /* Internal 48MHZ selected by default */
+ reg_val |= FIELD_PREP(CMN_PLL_REFCLK_INDEX, 7);
+ } else {
+ if (!strcmp(cmn_ref_clk, "external_25MHz"))
Not strings, please use u32 values. You can then list the valid values
in the yaml file, and get te tools to verify the DT.
will update this in the next patch.
+ reg_val |= (CMN_PLL_REFCLK_EXTERNAL |
+ FIELD_PREP(CMN_PLL_REFCLK_INDEX, 3));
+ else if (!strcmp(cmn_ref_clk, "external_31250KHz"))
+ reg_val |= (CMN_PLL_REFCLK_EXTERNAL |
+ FIELD_PREP(CMN_PLL_REFCLK_INDEX, 4));
+ else if (!strcmp(cmn_ref_clk, "external_40MHz"))
+ reg_val |= (CMN_PLL_REFCLK_EXTERNAL |
+ FIELD_PREP(CMN_PLL_REFCLK_INDEX, 6));
+ else if (!strcmp(cmn_ref_clk, "external_48MHz"))
+ reg_val |= (CMN_PLL_REFCLK_EXTERNAL |
+ FIELD_PREP(CMN_PLL_REFCLK_INDEX, 7));
+ else if (!strcmp(cmn_ref_clk, "external_50MHz"))
+ reg_val |= (CMN_PLL_REFCLK_EXTERNAL |
+ FIELD_PREP(CMN_PLL_REFCLK_INDEX, 8));
+ else
+ reg_val |= FIELD_PREP(CMN_PLL_REFCLK_INDEX, 7);
If the value is not valid, return -EINVAL.
will add it in the next patch set.
Andrew
