On 11/7/2023 1:34 PM, Krzysztof Kozlowski wrote:
There is no "multi-ch-bit-off" property in LLCC, according to bindings
and Linux driver:
qdu1000-idp.dtb: system-cache-controller@19200000: 'multi-ch-bit-off' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 618a101eb53a..89eff977d40e 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1450,7 +1450,6 @@ system-cache-controller@19200000 {
reg-names = "llcc0_base",
"llcc_broadcast_base";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
- multi-ch-bit-off = <24 2>;
We should instead mention below nvmem cell property and add sec-qfprom
node for qdu1000 with multi-chan-ddr bits information, similar to the
example given here.
https://lore.kernel.org/lkml/20230801064025.17381-2-quic_kbajaj@xxxxxxxxxxx/
nvmem-cells = <&multi-chan-ddr>;
nvmem-cell-names = "multi-chan-ddr";
Let me know if you are going to send this.
Acked-by: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>
-Mukesh
};
};
