Re: [PATCH 1/2] arm64: dts: qcom: qdu1000: correct LLCC reg entries

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On 11/7/2023 1:34 PM, Krzysztof Kozlowski wrote:
According to bindings and Linux driver there is no
"multi_channel_register" address space for LLCC.  The first "reg" entry
is supposed to be llcc0_base since commit 43aa006e074c ("dt-bindings:
arm: msm: Fix register regions used for LLCC banks"):

   qdu1000-idp.dtb: system-cache-controller@19200000: reg: [[0, 421527552, 0, 14155776], [0, 438304768, 0, 524288], [0, 572293416, 0, 4]] is too long
   qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:0: 'llcc0_base' was expected
   qdu1000-idp.dtb: system-cache-controller@19200000: reg-names: ['llcc_base', 'llcc_broadcast_base', 'multi_channel_register'] is too long

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/qdu1000.dtsi | 8 +++-----
  1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 1c0e5d271e91..618a101eb53a 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1446,11 +1446,9 @@ gem_noc: interconnect@19100000 {
  		system-cache-controller@19200000 {
  			compatible = "qcom,qdu1000-llcc";
  			reg = <0 0x19200000 0 0xd80000>,
-			      <0 0x1a200000 0 0x80000>,
-			      <0 0x221c8128 0 0x4>;
-			reg-names = "llcc_base",
-				    "llcc_broadcast_base",
-				    "multi_channel_register";
+			      <0 0x1a200000 0 0x80000>;
+			reg-names = "llcc0_base",
+				    "llcc_broadcast_base";


Thanks for fixing this.
This indeed needed to be fixed, looks like it got missed after
moving to below sec-qfprom of reading multichannel.

https://lore.kernel.org/lkml/20230801064025.17381-2-quic_kbajaj@xxxxxxxxxxx/

Acked-by: Mukesh Ojha <quic_mojha@xxxxxxxxxxx>

-Mukesh

  			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
  			multi-ch-bit-off = <24 2>;
  		};




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