Hi Arnd,
On Wed, Jan 7, 2015 at 1:32 AM, Arnd Bergmann <arnd@xxxxxxxx> wrote:
> On Tuesday 06 January 2015 15:04:26 Ganapatrao Kulkarni wrote:
>> On Sat, Jan 3, 2015 at 2:47 AM, Arnd Bergmann <arnd@xxxxxxxx> wrote:
>> > On Wednesday 31 December 2014 13:03:27 Ganapatrao Kulkarni wrote:
>> >> + cpu@00f {
>> >> + device_type = "cpu";
>> >> + compatible = "cavium,thunder", "arm,armv8";
>> >> + reg = <0x0 0x00f>;
>> >> + enable-method = "psci";
>> >> + arm,associativity = <0 0 0x00f>;
>> >> + };
>> >> + cpu@100 {
>> >> + device_type = "cpu";
>> >> + compatible = "cavium,thunder", "arm,armv8";
>> >> + reg = <0x0 0x100>;
>> >> + enable-method = "psci";
>> >> + arm,associativity = <0 0 0x100>;
>> >> + };
>> >
>> > What is the 0x100 offset in the last-level topology field? Does this have
>> > no significance to topology at all? I would expect that to be something
>> > like cluster number that is relevant to caching and should be represented
>> > as a separate level.
>>
>> i did not understand, can you please explain little more about "
>> should be represented as a separate level."
>> at present, i have put the hwid of a cpu.
>
> From what I undertand, the hwid of the CPU contains the "cluster" number in
> this bit position, so you typically have a shared L2 or L3 cache between
> all cores within a cluster, but separate caches in other clusters.
>
> If this is the case, there will be a measurable difference in performance
> between two processes sharing memory when running on the same cluster,
> or when running on different clusters on the same socket. If the
> performance difference is relevant, it should be described as a separate
> level in the associativity property.
you mean, the associativity as array of <board> <socket> <cluster>
>
> Arnd
thanks
ganapat
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