On Mon, Aug 07, 2023 at 09:35:00PM +0200, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
>
> Add a node for the second MAC on sa8775p platforms.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@xxxxxxxxxx>
Reviewed-by: Andrew Halaney <ahalaney@xxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 34 +++++++++++++++++++++++++++
> 1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 38d10af37ab0..82af2e6cbda4 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -2325,6 +2325,40 @@ cpufreq_hw: cpufreq@18591000 {
> #freq-domain-cells = <1>;
> };
>
> + ethernet1: ethernet@23000000 {
> + compatible = "qcom,sa8775p-ethqos";
> + reg = <0x0 0x23000000 0x0 0x10000>,
> + <0x0 0x23016000 0x0 0x100>;
> + reg-names = "stmmaceth", "rgmii";
> +
> + interrupts = <GIC_SPI 929 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "macirq";
> +
> + clocks = <&gcc GCC_EMAC1_AXI_CLK>,
> + <&gcc GCC_EMAC1_SLV_AHB_CLK>,
> + <&gcc GCC_EMAC1_PTP_CLK>,
> + <&gcc GCC_EMAC1_PHY_AUX_CLK>;
> +
> + clock-names = "stmmaceth",
> + "pclk",
> + "ptp_ref",
> + "phyaux";
> +
> + power-domains = <&gcc EMAC1_GDSC>;
> +
> + phys = <&serdes1>;
> + phy-names = "serdes";
> +
> + iommus = <&apps_smmu 0x140 0xf>;
> +
> + snps,tso;
> + snps,pbl = <32>;
> + rx-fifo-depth = <16384>;
> + tx-fifo-depth = <16384>;
> +
> + status = "disabled";
> + };
> +
> ethernet0: ethernet@23040000 {
> compatible = "qcom,sa8775p-ethqos";
> reg = <0x0 0x23040000 0x0 0x10000>,
> --
> 2.39.2
>
