On 03/08/2023 08:30, Conor Dooley wrote:
>>>> gpio0:gpio@0x1fe10430 {
>>>> compatible = "loongson,ls2k-gpio";
>>>> reg = <0 0x1fe10430 0 0x20>;
>>>> gpio-controller;
>>>> #gpio-cells = <2>;
>>>> interrupt-parent = <&liointc1>;
>>>> ngpios = <64>;
>>>> loongson,gpio-conf-offset = <0>;
>>>> loongson,gpio-out-offset = <0x10>;
>>>> loongson,gpio-in-offset = <0x8>;
>>>> loongson,gpio-inten-offset = <0xb0>;
>>>> loongson,gpio-ctrl-mode = <0x0>;
>>>> ...
>>>> }
>>>>
>>>> gpio1:gpio@0x1fe10450 {
>>>> compatible = "loongson,ls2k-gpio";
>>>> reg = <0 0x1fe10450 0 0x20>;
>>>> gpio-controller;
>>>> #gpio-cells = <2>;
>>>> interrupt-parent = <&liointc1>;
>>>> ngpios = <64>;
>>>> loongson,gpio-conf-offset = <0>;
>>>> loongson,gpio-out-offset = <0x10>;
>>>> loongson,gpio-in-offset = <0x8>;
>>>
>>> These 3 are the same for both controllers, no?
>>> Is only the inten-offset a variable?
>>>
>>>> loongson,gpio-inten-offset = <0x98>;
>>>
>>> These offsets exceed the region that you've got in the reg property for
>>> this controller, do they not?
>>>
>>> Is there some sort of "miscellaneous register area" at 0x1FE104E0, or
>>> just those two interrupt registers and nothing else?
>>
>>
>> 2k500 gpio dts is just an example, like 3a5000, or more other platform,
>> above offset was different but the gpio controller was compatible.
>>
>> gpio: gpio@1fe00500 {
>> compatible = "loongson,ls2k-gpio";
>> reg = <0 0x1fe00500 0xc00>;
>> gpio-controller;
>> #gpio-cells = <2>;
>> ngpios = <16>;
>> loongson,gpio-conf-offset = <0x0>;
>> loongson,gpio-out-offset = <0x8>;
>> loongson,gpio-in-offset = <0xc>;
>> ...
>> }
>
> That is a different SoC and needs to have a different compatible string.
> "loongson,ls2k-foo" compatible strings were a mistake that only got past
> us because we were not aware it was a family, rather than a specific
> SoC. They certainly should not be used in isolation on a 3a5000!
>
> Are there more than one GPIO controllers on the 3a5000? If so, what do
> those nodes look like.
Eh, even for the same SoC having different offsets suggest that
programming model is a bit different. Anyway, who designed such
hardware? Really?
Best regards,
Krzysztof
