For VSC8351 and similar PHYs, a new property was added to generate a clock
signal on the CLKOUT pin.
This change documents the change in the device-tree bindings doc.
Signed-off-by: Alexandru Ardelean <alex@xxxxxxxxxxx>
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
index 0a3647fe331b..133bdd644618 100644
--- a/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
+++ b/Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt
@@ -31,6 +31,10 @@ Optional properties:
VSC8531_LINK_100_ACTIVITY (2),
VSC8531_LINK_ACTIVITY (0) and
VSC8531_DUPLEX_COLLISION (8).
+- vsc8531,clkout-freq-mhz : For VSC8531 and similar PHYs, this will output
+ a clock signal on the CLKOUT pin of the chip.
+ The supported values are 25, 50 & 125 Mhz.
+ Default value is no clock signal on the CLKOUT pin.
- load-save-gpios : GPIO used for the load/save operation of the PTP
hardware clock (PHC).
@@ -69,5 +73,6 @@ Example:
vsc8531,edge-slowdown = <7>;
vsc8531,led-0-mode = <VSC8531_LINK_1000_ACTIVITY>;
vsc8531,led-1-mode = <VSC8531_LINK_100_ACTIVITY>;
+ vsc8531,clkout-freq-mhz = <50>;
load-save-gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
};
--
2.40.1
