On Fri, Mar 31, 2023 at 03:12:36PM +0200, Lorenzo Bianconi wrote: > Since cpuboot, ilm and dlm memory region are not part of MT7986 SoC RAM, That's not really a requirement. Is that the only "problem" here? Certainly going from a standard binding to a custom phandle reference is not an improvement. > move them in dedicated mt7986a syscon dts nodes. What makes them a syscon? Are they memory or h/w registers? Can't be both... Perhaps mmio-sram? > At the same time we keep backward-compatibility with older dts version where > cpuboot, ilm and dlm were defined as reserved-memory child nodes. Doesn't really seem big enough issue to justify carrying this. Rob
