On 23/03/2023 06:04, Tao Zhang wrote:
Add nodes to configure trigger pattern and trigger pattern mask. Each DSB subunit TPDM has maximum of n(n<7) XPR registers to configure trigger pattern match output. Eight 32 bit registers providing DSB interface trigger output pattern match comparison. And each DSB subunit TPDM has maximum of m(m<7) XPMR registers to configure trigger pattern mask match output. Eight 32 bit registers providing DSB interface trigger output pattern match mask. Signed-off-by: Tao Zhang <quic_taozha@xxxxxxxxxxx> --- .../ABI/testing/sysfs-bus-coresight-devices-tpdm | 24 +++++++ drivers/hwtracing/coresight/coresight-tpdm.c | 84 ++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-tpdm.h | 8 +++ 3 files changed, 116 insertions(+) diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm index 094d624..c06374f 100644 --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm @@ -71,3 +71,27 @@ Description: value 1: Start EDCMR register number value 2: End EDCMR register number value 3: The value need to be written + +What: /sys/bus/coresight/devices/<tpdm-name>/dsb_trig_patt_val +Date: March 2023 +KernelVersion 6.3 +Contact: Jinlong Mao (QUIC) <quic_jinlmao@xxxxxxxxxxx>, Tao Zhang (QUIC) <quic_taozha@xxxxxxxxxxx> +Description: + (Write) Set the trigger pattern value of DSB tpdm. + Read the trigger pattern value of DSB tpdm. + + Accepts the following two values. + value 1: Index number of XPR register + value 2: The value need to be written
minor nit: What values are acceptable ? Otherwise looks fine. Reviewed-by: Suzuki K Poulose <suzuki.poulose@xxxxxxx>
