Correct the number of GPIOs in TLMM pin controller. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 6ff135191ee0..24c7e3378b9d 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2546,7 +2546,7 @@ tlmm: pinctrl@f000000 { #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; - gpio-ranges = <&tlmm 0 0 211>; + gpio-ranges = <&tlmm 0 0 210>; wakeup-parent = <&pdc>; hub_i2c0_data_clk: hub-i2c0-data-clk-state { -- 2.34.1