Correct the number of GPIOs in TLMM pin controller.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index ec9946e5f08d..b4c2b6dc1574 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -796,7 +796,7 @@ tlmm: pinctrl@3400000 {
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 151>;
+ gpio-ranges = <&tlmm 0 0 150>;
qup_i2c0_default: qup-i2c0-default-state {
pins = "gpio0", "gpio1";
--
2.34.1
