The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values from OCOTP. Document optional phandle to OCOTP nvmem
provider.
Signed-off-by: Marek Vasut <marex@xxxxxxx>
---
Cc: Adam Ford <aford173@xxxxxxxxx>
Cc: Alice Guo <alice.guo@xxxxxxx>
Cc: Amit Kucheria <amitk@xxxxxxxxxx>
Cc: Daniel Lezcano <daniel.lezcano@xxxxxxxxxx>
Cc: Fabio Estevam <festevam@xxxxxxxxx>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
Cc: Li Jun <jun.li@xxxxxxx>
Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Cc: Markus Niebel <Markus.Niebel@xxxxxxxxxxxxxxx>
Cc: NXP Linux Team <linux-imx@xxxxxxx>
Cc: Peng Fan <peng.fan@xxxxxxx>
Cc: Pengutronix Kernel Team <kernel@xxxxxxxxxxxxxx>
Cc: Rafael J. Wysocki <rafael@xxxxxxxxxx>
Cc: Richard Cochran <richardcochran@xxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Cc: Sascha Hauer <s.hauer@xxxxxxxxxxxxxx>
Cc: Shawn Guo <shawnguo@xxxxxxxxxx>
Cc: Zhang Rui <rui.zhang@xxxxxxxxx>
Cc: devicetree@xxxxxxxxxxxxxxx
To: linux-pm@xxxxxxxxxxxxxxx
To: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
---
.../devicetree/bindings/thermal/imx8mm-thermal.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
index 89c54e08ee61b..b90726229ac9c 100644
--- a/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
+++ b/Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
@@ -32,6 +32,13 @@ properties:
clocks:
maxItems: 1
+ nvmem-cells:
+ maxItems: 1
+ description: Phandle to the calibration data provided by ocotp
+
+ nvmem-cell-names:
+ const: calib
+
"#thermal-sensor-cells":
description: |
Number of cells required to uniquely identify the thermal
--
2.35.1
