On 22/11/2022 13:12, Shubhrajyoti Datta wrote: > The Clocking Wizard for Versal adaptive compute acceleration platforms > generates multiple configurable number of clock outputs. > Add device tree binding for Versal clocking wizard support. > > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx> > > --- > > Changes in v3: > rename the clocks to clk_in1 and s_axi_clk dt > > Changes in v2: > rename the clocks clk_in1 to in1 and s_axi_clk to s_axi in dt > > .../clock/xlnx,versal-clk-wizard.yaml | 65 +++++++++++++++++++ > 1 file changed, 65 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/xlnx,versal-clk-wizard.yaml > We pointed out last time that you already have the bindings for it (xlnx,clocking-wizard.yaml). Don't duplicate it. I don't think this deserves new bindings and new driver. Best regards, Krzysztof
