On 18/11/2022 02:06, Hal Feng wrote: > From: Emil Renner Berthing <kernel@xxxxxxxx> > > Add bindings for the system clock and reset generator (SYSCRG) on the > JH7110 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx> > Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx> Binding headers are coming with the file bringing bindings for the device, so you need to squash patches. > --- > .../clock/starfive,jh7110-syscrg.yaml | 80 +++++++++++++++++++ > MAINTAINERS | 2 +- > 2 files changed, 81 insertions(+), 1 deletion(-) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > new file mode 100644 > index 000000000000..a8cafbc0afe2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > @@ -0,0 +1,80 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: StarFive JH7110 System Clock and Reset Generator > + > +maintainers: > + - Emil Renner Berthing <kernel@xxxxxxxx> > + > +properties: > + compatible: > + const: starfive,jh7110-syscrg > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Main Oscillator (24 MHz) > + - description: RMII reference clock > + - description: RGMII RX clock > + - description: I2S TX bit clock > + - description: I2S TX left/right clock > + - description: I2S RX bit clock > + - description: I2S RX left/right clock > + - description: TDM > + - description: mclk > + > + clock-names: > + items: > + - const: osc > + - const: gmac1_rmii_refin > + - const: gmac1_rgmii_rxin > + - const: i2stx_bclk_ext > + - const: i2stx_lrck_ext > + - const: i2srx_bclk_ext > + - const: i2srx_lrck_ext > + - const: tdm_ext > + - const: mclk_ext > + > + '#clock-cells': > + const: 1 > + description: > + See <dt-bindings/clock/starfive-jh7110.h> for valid indices. Fix filename. > + > + '#reset-cells': > + const: 1 > + description: > + See <dt-bindings/reset/starfive-jh7110.h> for valid indices. Fix filename. > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - '#clock-cells' > + - '#reset-cells' > + Best regards, Krzysztof
