On 09/11/2022 11:09, Vivek Yadav wrote:
> Whenever MCAN Buffers and FIFOs are stored on message ram, there are
> inherent risks of corruption known as single-bit errors.
>
> Enable error correction code (ECC) data integrity check for Message RAM
> to create valid ECC checksums.
>
> ECC uses a respective number of bits, which are added to each word as a
> parity and that will raise the error signal on the corruption in the
> Interrupt Register(IR).
>
> This indicates either bit error detected and Corrected(BEC) or No bit
> error detected when reading from Message RAM.
>
> Signed-off-by: Chandrasekar R <rcsekar@xxxxxxxxxxx>
> Signed-off-by: Vivek Yadav <vivek.2311@xxxxxxxxxxx>
(...)
>
> +static int m_can_plat_init(struct m_can_classdev *cdev)
> +{
> + struct m_can_ecc_regmap *ecc_cfg = &cdev->ecc_cfg_sys;
> + struct device_node *np = cdev->dev->of_node;
> + int ret = 0;
> +
> + if (cdev->mram_cfg_flag != ECC_ENABLE) {
> + /* Initialize mcan message ram */
> + ret = m_can_init_ram(cdev);
> +
> + if (ret)
> + return ret;
> +
> + cdev->mram_cfg_flag = ECC_ENABLE;
> + }
> +
> + if (ecc_cfg->ecc_cfg_flag != ECC_ENABLE) {
> + /* configure error code check for mram */
> + if (!ecc_cfg->syscon) {
> + ecc_cfg->syscon =
> + syscon_regmap_lookup_by_phandle_args(np,
> + "tesla,mram-ecc-cfg"
> + , 1,
, goes to previous line
> + &ecc_cfg->reg);
> + }
> +
> + if (IS_ERR(ecc_cfg->syscon)) {
> + dev_err(cdev->dev, "couldn't get the syscon reg!\n");
Didn't you just break all platforms using ECC?
Best regards,
Krzysztof
