Quoting Aidan MacDonald (2022-10-26 12:43:44) > The X1000's CGU supplies the I2S system clock to the AIC module > and ultimately the audio codec, represented by the "i2s" clock. > It is a simple mux which can either pass through EXCLK or a PLL > multiplied by a fractional divider (the "i2s_pll" clock). > > The AIC contains a separate 1/N divider controlled by the I2S > driver, which generates the bit clock from the system clock. > The frame clock is always fixed to 1/64th of the bit clock. > > Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@xxxxxxxxx> > --- Applied to clk-next
