On Fri, Sep 30, 2022 at 03:00:28PM +0200, Michal Simek wrote: > Hi Rob, > > On 9/30/22 14:25, Rob Herring wrote: > > On Fri, Sep 30, 2022 at 3:04 AM Shubhrajyoti Datta > > <shubhrajyoti.datta@xxxxxxx> wrote: > > > > > > The Clocking Wizard for Versal adaptive compute acceleration platforms > > > generates multiple configurable number of clock outputs. > > > Add device tree binding for Versal clocking wizard support. > > > > Really v1? I'm sure I heard of this wizard before. > > > > What about this?: > > > > drivers/staging/clocking-wizard/dt-binding.txt > > > > That needs to be moved out of staging rather than adding a 2nd one. > > > Let me clarify this. This is IP which is already moved out of staging. > Linux-next has these changes and waiting for MW to happen (already in clock > tree). Where does this series explain that? If the dependency is not the latest rc1, then state that. > And this is new IP. Not sure who has chosen similar name but this targets > Xilinx Versal SOCs. Origin one was targeting previous families. Do we need a whole new schema doc? It is not ideal to define the same property, xlnx,nr-outputs, more than once. And it's only a new compatible string. Rob
