From: Markus Niebel <Markus.Niebel@xxxxxxxxxxxxxxx>
The i.MX8M Nano has the same PWM IP as i.MX6 / i.MX7. This IP
and the driver supporting pwm polarity inversion. Switch CPU
device tree fragment to use 3 pwm-cells.
Signed-off-by: Markus Niebel <Markus.Niebel@xxxxxxxxxxxxxxx>
Signed-off-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 8def5d679e7e..e41e1d56f980 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -705,7 +705,7 @@ pwm1: pwm@30660000 {
clocks = <&clk IMX8MN_CLK_PWM1_ROOT>,
<&clk IMX8MN_CLK_PWM1_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -716,7 +716,7 @@ pwm2: pwm@30670000 {
clocks = <&clk IMX8MN_CLK_PWM2_ROOT>,
<&clk IMX8MN_CLK_PWM2_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -727,7 +727,7 @@ pwm3: pwm@30680000 {
clocks = <&clk IMX8MN_CLK_PWM3_ROOT>,
<&clk IMX8MN_CLK_PWM3_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
@@ -738,7 +738,7 @@ pwm4: pwm@30690000 {
clocks = <&clk IMX8MN_CLK_PWM4_ROOT>,
<&clk IMX8MN_CLK_PWM4_ROOT>;
clock-names = "ipg", "per";
- #pwm-cells = <2>;
+ #pwm-cells = <3>;
status = "disabled";
};
--
2.25.1
