ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL
has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore,
added a new compatible to handle this difference.
Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
---
v1->v2:
* Removed Items and used const for RZ/G2UL compatible
* Add allOf:if:then restricting available channels per SoC variant.
---
.../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++-----
1 file changed, 25 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
index d66c24cae1e1..d76c5ba3d625 100644
--- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
+++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
@@ -17,11 +17,13 @@ description: |
properties:
compatible:
- items:
- - enum:
- - renesas,r9a07g044-adc # RZ/G2L
- - renesas,r9a07g054-adc # RZ/V2L
- - const: renesas,rzg2l-adc
+ oneOf:
+ - const: renesas,renesas,r9a07g043-adc # RZ/G2UL
+ - items:
+ - enum:
+ - renesas,r9a07g044-adc # RZ/G2L
+ - renesas,r9a07g054-adc # RZ/V2L
+ - const: renesas,rzg2l-adc
reg:
maxItems: 1
@@ -76,10 +78,24 @@ patternProperties:
properties:
reg:
description: |
- The channel number. It can have up to 8 channels numbered from 0 to 7.
- items:
- - minimum: 0
- maximum: 7
+ The channel number. It can have up to 8 channels numbered from 0 to 7
+ for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for RZ/G2UL
+ SoC.
+ allOf:
+ if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - renesas,renesas,r9a07g043-adc
+ then:
+ items:
+ - minimum: 0
+ maximum: 1
+ else:
+ items:
+ - minimum: 0
+ maximum: 7
required:
- reg
--
2.25.1
