Hi Biju,
Thank you for the patch.
> -----Original Message-----
> From: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> Sent: 01 May 2022 12:20
> To: Jonathan Cameron <jic23@xxxxxxxxxx>; Rob Herring <robh+dt@xxxxxxxxxx>;
> Krzysztof Kozlowski <krzysztof.kozlowski+dt@xxxxxxxxxx>
> Cc: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>; Lars-Peter Clausen
> <lars@xxxxxxxxxx>; linux-iio@xxxxxxxxxxxxxxx; linux-renesas-
> soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; Chris Paterson <Chris.Paterson2@xxxxxxxxxxx>;
> Biju Das <biju.das@xxxxxxxxxxxxxx>
> Subject: [PATCH v2] dt-bindings: iio: adc: Document Renesas RZ/G2UL ADC
>
> ADC found on RZ/G2UL SoC is almost identical to RZ/G2L SoC, but RZ/G2UL
> has 2 analog input channels compared to 8 channels on RZ/G2L. Therefore,
> added a new compatible to handle this difference.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> v1->v2:
> * Removed Items and used const for RZ/G2UL compatible
> * Add allOf:if:then restricting available channels per SoC variant.
> ---
> .../bindings/iio/adc/renesas,rzg2l-adc.yaml | 34 ++++++++++++++-----
> 1 file changed, 25 insertions(+), 9 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-
> adc.yaml b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-
> adc.yaml
> index d66c24cae1e1..d76c5ba3d625 100644
> --- a/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
> +++ b/Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
> @@ -17,11 +17,13 @@ description: |
>
> properties:
> compatible:
> - items:
> - - enum:
> - - renesas,r9a07g044-adc # RZ/G2L
> - - renesas,r9a07g054-adc # RZ/V2L
> - - const: renesas,rzg2l-adc
> + oneOf:
> + - const: renesas,renesas,r9a07g043-adc # RZ/G2UL
renesas,r9a07g043-adc # RZ/G2UL ?
We need to decide if this needs to be separate elements or part of below enum depending on the driver change.
> + - items:
> + - enum:
> + - renesas,r9a07g044-adc # RZ/G2L
> + - renesas,r9a07g054-adc # RZ/V2L
> + - const: renesas,rzg2l-adc
>
> reg:
> maxItems: 1
> @@ -76,10 +78,24 @@ patternProperties:
> properties:
> reg:
> description: |
> - The channel number. It can have up to 8 channels numbered from
> 0 to 7.
> - items:
> - - minimum: 0
> - maximum: 7
> + The channel number. It can have up to 8 channels numbered from
> 0 to 7
> + for RZ/{G2L,V2L} SoCs or 2 channels numbered from 0 to 1 for
> RZ/G2UL
> + SoC.
This comment is not required as we already have the below hunk where it mentions for RZ/G2UL its two channel.
> + allOf:
> + if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,renesas,r9a07g043-adc
renesas,r9a07g043-adc
Cheers,
Prabhakar
> + then:
> + items:
> + - minimum: 0
> + maximum: 1
> + else:
> + items:
> + - minimum: 0
> + maximum: 7
>
> required:
> - reg
> --
> 2.25.1
