> -----Original Message----- > From: Lucas Stach <l.stach@xxxxxxxxxxxxxx> > Sent: 2022年4月15日 4:48 > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>; p.zabel@xxxxxxxxxxxxxx; > bhelgaas@xxxxxxxxxx; lorenzo.pieralisi@xxxxxxx; robh@xxxxxxxxxx; > shawnguo@xxxxxxxxxx; vkoul@xxxxxxxxxx; alexander.stein@xxxxxxxxxxxxxxx > Cc: linux-phy@xxxxxxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; > linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-kernel@xxxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx; dl-linux-imx > <linux-imx@xxxxxxx> > Subject: Re: [PATCH v2 1/7] reset: imx7: Add the iMX8MP PCIe PHY PERST > support > > Am Montag, dem 07.03.2022 um 17:07 +0800 schrieb Richard Zhu: > > Add the i.MX8MP PCIe PHY PERST support. > > As Philipp said: please add some more description on why this is necessary. As > far as I can see the reset is already present on 8MQ, and is low-active, like this > patch claims. We just didn't handle this reset at all on other SoCs as the power > on de-asserted state was okay to get things working. > Yes, it is. I had asking the details from design team. Would update the description after I get the more information. Best Regards Richard Zhu > Regards, > Lucas > > > > > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx> > > --- > > drivers/reset/reset-imx7.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/reset/reset-imx7.c b/drivers/reset/reset-imx7.c > > index 185a333df66c..d2408725eb2c 100644 > > --- a/drivers/reset/reset-imx7.c > > +++ b/drivers/reset/reset-imx7.c > > @@ -329,6 +329,7 @@ static int imx8mp_reset_set(struct > reset_controller_dev *rcdev, > > break; > > > > case IMX8MP_RESET_PCIE_CTRL_APPS_EN: > > + case IMX8MP_RESET_PCIEPHY_PERST: > > value = assert ? 0 : bit; > > break; > > } >
