Thank you for your patch. There is something to discuss/improve.
This should be sent with your DT bindings patch in one patchset.
On 07/04/2022 12:58, Kavyasree Kotagiri wrote:
> LAN966x SoC supports 3 instances of QSPI.
> Data and clock of qspi0, qspi1, qspi2 works upto 100Mhz.
s/upto/up to/
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 48 ++++++++++++++++++++++++++++++++++
> 1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..b3c687db0aea 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -196,6 +196,54 @@
> status = "disabled";
> };
>
> + qspi0: spi@e0804000 {
> + compatible = "microchip,lan966x-qspi";
> + reg = <0xe0804000 0x100>,
> + <0x20000000 0x08000000>;
> + reg-names = "qspi_base", "qspi_mmap";
> + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_ID_QSPI0>;
> + clock-names = "gclk";
This is not correct with the DT schema.
> + dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>,
> + <&dma0 AT91_XDMAC_DT_PERID(1)>;
> + dma-names = "rx", "tx";
This as well.
You can test schema with 'make dtbs_check DT_SCHEMA_FILES=...."
(check the docs for help what is needed to do it).
Best regards,
Krzysztof
