On 07/04/2022 12:58, Kavyasree Kotagiri wrote:
> Enable QSPI0 controller and sst26vf016b SPI-NOR flash present on it.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@xxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/lan966x-pcb8291.dts | 15 +++++++++++++++
> 1 file changed, 15 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3281af90ac6d..99d96d46661d 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -62,3 +62,18 @@
> &watchdog {
> status = "okay";
> };
> +
> +&qspi0 {
> + status = "okay";
> +
> + spi-flash@0 {
Just "flash" please (to be generic).
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <20000000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
Why do you need address/size cells here? You don't have any children.
> + spi-tx-bus-width = <4>;
> + spi-rx-bus-width = <4>;
> + m25p,fast-read;
> + };
> +};
Best regards,
Krzysztof
