On 2022-03-03 01:54:11, Dmitry Baryshkov wrote:
> The number of interrupt cells for the mdss interrupt controller is 1,
> meaning there should only be one cell for the interrupt number, not two.
> Drop the second cell containing (unused) irq flags.
>
> Fixes: 5a9fc531f6ec ("ARM: dts: msm8974: add display support")
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
Thanks for adding the Fixes: tag.
Reviewed-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
> ---
> arch/arm/boot/dts/qcom-msm8974.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
> index 412d94736c35..3b9af5e24907 100644
> --- a/arch/arm/boot/dts/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
> @@ -1495,7 +1495,7 @@ mdp: mdp@fd900000 {
> reg-names = "mdp_phys";
>
> interrupt-parent = <&mdss>;
> - interrupts = <0 0>;
> + interrupts = <0>;
>
> clocks = <&mmcc MDSS_AHB_CLK>,
> <&mmcc MDSS_AXI_CLK>,
> @@ -1530,7 +1530,7 @@ dsi0: dsi@fd922800 {
> reg-names = "dsi_ctrl";
>
> interrupt-parent = <&mdss>;
> - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> + interrupts = <4>;
>
> assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
> <&mmcc PCLK0_CLK_SRC>;
> --
> 2.34.1
>
