On Mon, 2021-11-01 at 14:18 +0800, LH.Kuo wrote:
[...]
> +static int pentagram_spi_controller_probe(struct platform_device *pdev)
> +{
> + struct resource *res;
> + int ret;
> + int mode;
> + unsigned int max_freq;
> + struct spi_controller *ctlr;
> + struct pentagram_spi_master *pspim;
> +
> + FUNC_DBG();
Drop these.
[...]
> + /* clk*/
> + pspim->spi_clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(pspim->spi_clk)) {
> + dev_err(&pdev->dev, "devm_clk_get fail\n");
> + goto free_alloc;
> + }
> + ret = clk_prepare_enable(pspim->spi_clk);
Move this and reset_control_deassert() as far back as possible.
> + if (ret)
> + goto free_alloc;
> +
> + /* reset*/
> + pspim->rstc = devm_reset_control_get(&pdev->dev, NULL);
Use devm_reset_control_get_exclusive() instead.
This should be done before clk_prepare_enable().
> + dev_dbg(&pdev->dev, "pspim->rstc : 0x%x\n", (unsigned int)pspim->rstc);
> + if (IS_ERR(pspim->rstc)) {
> + ret = PTR_ERR(pspim->rstc);
> + dev_err(&pdev->dev, "SPI failed to retrieve reset controller: %d\n", ret);
> + goto free_clk;
> + }
> + ret = reset_control_deassert(pspim->rstc);
Same as the clock, I'd move this after the dma allocations.
> + if (ret)
> + goto free_clk;
> +
> + /* dma alloc*/
> + pspim->tx_dma_vir_base = dma_alloc_coherent(&pdev->dev, bufsiz,
> + &pspim->tx_dma_phy_base, GFP_ATOMIC);
Consider using dmam_alloc_coherent, same for rx_dma_vir_base.
regards
Philipp
