Add devicetree bindings SPI Add bindings doc for Sunplus SP7021 Signed-off-by: LH.Kuo <lh.kuo@xxxxxxxxxxx> --- .../bindings/spi/spi-sunplus-sp7021.yaml | 95 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 96 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml diff --git a/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml new file mode 100644 index 0000000..3ce90db --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) Sunplus Co., Ltd. 2021 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/spi/spi-sunplus-sp7021.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sunplus sp7021 SPI controller + +allOf: + - $ref: "spi-controller.yaml" + +maintainers: + - lh.kuo <lh.kuo@xxxxxxxxxxx> + +properties: + compatible: + enum: + - sunplus,sp7021-spi-controller + + reg: + items: + - description: Base address and length of the SPI master registers + - description: Base address and length of the SPI slave registers + + reg-names: + items: + - const: spi_master + - const: spi_slave + + interrupt-names: + items: + - const: dma_w_intr + - const: mas_risc_intr + - const: slave_risc_intr + + interrupts: + minItems: 3 + + clocks: + maxItems: 1 + + clocks-names: + items: + - const: sys_pll + + resets: + maxItems: 1 + + pinctrl-names: + description: + A pinctrl state named "default" must be defined. + const: default + + pinctrl-0: + description: + A phandle to the default pinctrl state. + +required: + - compatible + - reg + - reg-names + - interrupts + - interrupt-names + - clocks + - clocks-names + - resets + - pinctrl-names + - pinctrl-0 + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/sp-sp7021.h> + #include <dt-bindings/reset/sp-sp7021.h> + #include <dt-bindings/interrupt-controller/irq.h> + spi_controller0: spi@9C002D80 { + compatible = "sunplus,sp7021-spi-controller"; + reg = <0x9C002D80 0x80>, <0x9C002E00 0x80>; + reg-names = "spi_master", "spi_slave"; + interrupt-parent = <&intc>; + interrupt-names = "dma_w_intr", + "mas_risc_intr", + "slave_risc_intr"; + interrupts = <144 IRQ_TYPE_LEVEL_HIGH>, + <146 IRQ_TYPE_LEVEL_HIGH>, + <145 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc SPI_COMBO_0>; + clocks-names = "sys_pll"; + resets = <&rstc RST_SPI_COMBO_0>; + pinctrl-names = "default"; + pinctrl-0 = <&pins_spi0>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index f00c466..f6cf9d8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17949,6 +17949,7 @@ SUNPLUS SPI CONTROLLER INTERFACE DRIVER M: LH Kuo <lh.kuo@xxxxxxxxxxx> L: sdricohcs-devel@xxxxxxxxxxxxxxxxxxxxx (subscribers-only) S: Maintained +F: Documentation/devicetree/bindings/spi/spi-sunplus-sp7021.yaml F: drivers/spi/spi-sunplus-sp7021.c SUPERH -- 2.7.4
