On Mon, Jan 11, 2021 at 01:08:47PM +0530, Kuldeep Singh wrote:
> LX2160A supports two flexcan controllers. Add the support.
> Enable support further for LX2160A-RDB/QDS.
>
> Signed-off-by: Kuldeep Singh <kuldeep.singh@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 8 ++++++++
> arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 16 ++++++++++++++++
> arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 20 ++++++++++++++++++++
> 3 files changed, 44 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> index 16ae3b0..d858d9c 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
> @@ -33,6 +33,14 @@
> };
> };
>
> +&can0 {
> + status = "okay";
> +};
> +
> +&can1 {
> + status = "okay";
> +};
> +
> &crypto {
> status = "okay";
> };
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> index 6f82759..5dbf274 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -89,6 +89,22 @@
> };
> };
>
> +&can0 {
> + status = "okay";
> +
> + can-transceiver {
> + max-bitrate = <5000000>;
> + };
> +};
> +
> +&can1 {
> + status = "okay";
> +
> + can-transceiver {
> + max-bitrate = <5000000>;
> + };
> +};
> +
> &esdhc0 {
> sd-uhs-sdr104;
> sd-uhs-sdr50;
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 0d4bce1..63a3ef6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -878,6 +878,26 @@
> status = "disabled";
> };
>
> + can0: can@2180000 {
> + compatible = "fsl,lx2160ar1-flexcan";
> + reg = <0x0 0x2180000 0x0 0x10000>;
> + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>, <&sysclk>;
Can defines in dt-bindings/clock/fsl,qoriq-clockgen.h be useful?
Shawn
> + clock-names = "ipg", "per";
> + fsl,clk-source = <0>;
> + status = "disabled";
> + };
> +
> + can1: can@2190000 {
> + compatible = "fsl,lx2160ar1-flexcan";
> + reg = <0x0 0x2190000 0x0 0x10000>;
> + interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clockgen 4 7>, <&sysclk>;
> + clock-names = "ipg", "per";
> + fsl,clk-source = <0>;
> + status = "disabled";
> + };
> +
> uart0: serial@21c0000 {
> compatible = "arm,sbsa-uart","arm,pl011";
> reg = <0x0 0x21c0000 0x0 0x1000>;
> --
> 2.7.4
>
